The present invention relates to a solid-state imaging apparatus having a photoelectric conversion film, a driving method, and a camera.
Japanese Unexamined Patent Application Publication No. 2006-120922 describes configuration in which a photoelectric conversion film is applied to a CCD solid-state imaging apparatus.
FIG. 1 illustrates the imaging apparatus described in Japanese Unexamined Patent Application Publication No. 2006-120922.
A solid-state imaging apparatus 1 includes a p-well 3 on a semiconductor substrate 2, the p-well 3 including a charge accumulation unit 4, a barrier unit 5, a contact unit 6, and a charge transfer unit 7.
An insulating film 8 is provided on the p-well 3. On the insulating film 8, a photoelectric conversion film 9, an upper electrode 10, and a lower electrode 11 are provided. The lower electrode 11 and the contact unit 6 are connected via a contact 12 provided through the insulating film 8.
In the solid-state imaging apparatus 1, electrons generated by photoelectric conversion at the photoelectric conversion film 9 are accumulated in the charge accumulation unit 4.
The photoelectric conversion film 9 and the charge accumulation unit 4 are not directly connected; the barrier unit 5 is provided therebetween to overflow the barrier and guide the electrons to the charge accumulation unit 4.
The advantages of such configuration are as follows:
The electric potential of the lower electrode 11 in the photoelectric conversion film 9 equals the electric potential of the barrier unit 5.
This electric potential does not change even when a charge is accumulated in the charge accumulation unit 4.
As a result, the electrical field across the photoelectric conversion film 9 does not change depending on the signal.
Moreover, the linearity of the signal is good.
In this configuration, the contact unit 6 is separated from the charge accumulation unit 4. Thus, the electric potential of the contact unit 6 can be low. The electric potential of the charge accumulation unit 4 should be high for photoelectric accumulation.
As a result, the dark currents generated at the contact unit 6 can be reduced.
The solid-state imaging apparatus described in Japanese Unexamined Patent Application Publication No. 2006-120922 is a CCD type apparatus. With a MOS type solid-state imaging apparatus, images during the exposure period are not synchronized, causing moving subjects to be distorted.
Japanese Unexamined Patent Application Publication No. 2004-140149 describes a solid-state imaging apparatus including a photodiode that has a discharge transistor to synchronize images during the exposure period.
FIG. 2 illustrates a solid-state imaging apparatus described in Japanese Unexamined Patent Application Publication No. 2004-140149.
This solid-state imaging apparatus 20 includes a transfer transistor 21, an amplifier transistor 22, a selecting transistor 23, a reset transistor 24, a discharge transistor 25, and photodiode (PD) 26.
In such a case, the charge of the PD 26 is transferred to a floating diffusion (FD) in all pixels simultaneously, and the charge photoelectrically converted at the PD 26 while waiting for the signal to be read out one row at a time is discarded at a power supply Vdd via the discharge transistor 25.
Similar types of solid-state imaging apparatuses are also described in Japanese Unexamined Patent Applications Publication Nos. 11-239299, 2004-11590, 2009-49870, and 2008-258474.
When a solid-state imaging apparatus having a photoelectric conversion film and a barrier unit, as described in Japanese Unexamined Patent Application Publication No. 2006-120922, is modified into a MOS type solid-state imaging apparatus, synchronicity may be achieved in a screen by providing a discharge transistor, such as that described in Japanese Unexamined Patent Application Publication No. 2004-140149.
However, the inventors have recognized that there is still a problem. This problem will be discussed below.
Although not prior art, FIG. 3 illustrates the solid-state imaging apparatus of Japanese Unexamined Patent Application Publication No. 2006-120922, which is modified in a particular manner to be a MOS type solid-state imaging apparatus and further including a discharge transistor 13.
Photons that are generated at the photoelectric conversion film during the exposure period overflow to the accumulation unit by passing through the barrier unit, which is an electric potential barrier.
After the exposure period, the discharge transistor 13 is turned on, and the photons are discarded at the drain (A) of discharge transistor 13 so that the signals from the charge accumulation unit 4 are not damaged.
During this period, the electric potential of a contact unit (D) 6 should be higher than that of the barrier unit 5.
Then, the discharge transistor 13 is turned off before entering the next exposure period. However, since the electric potential of the contact unit (D) 6 is higher than that of the barrier unit 5, the electrons first entering the contact unit (D) 6 from the photoelectric conversion film 9 during the exposure period do not pass through the barrier unit 5 and are not accumulated in the charge accumulation unit 4.
As a result, the linearity of the signals is degraded.